EPM3032ALC44-4N vs EPM3032ALC44-4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3032ALC44-4N sa pamamagitan ng Intel at EPM3032ALC44-4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3032ALC44-4N | EPM3032ALC44-4 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | 2 |
| Usable Gates | 600 | 600 to 10,000 (MAX 3000A family range) |
| User I/O Pins | 34 | 34 |
| Pin-to-Pin Delay (tPD) | 4.5 ns | 4.5 ns |
| Maximum Counter Frequency (fCNT) | 227.3 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | 3.3 V (MultiVolt: 5.0 V / 3.3 V / 2.5 V compatible) |
| Packhaging | 44-pin PLCC (J-Lead) | 44-pin PLCC (J-Lead) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (PLCC J-Lead) |
| Programmability | EEPROM (non-volatile), IEEE 1149.1 JTAG ISP, IEEE 1532 compliant | — |
| Temperature na Operasyon | [DATA_NEEDED: industrial/commercial grade] | 0°C to +70°C (Commercial) |
| Tindminan RoHS | [DATA_NEEDED: from datasheet] | [DATA_NEEDED: RoHS status] |
| Maximum Counter Frequency | — | 227.3 MHz |
| Technology | — | CMOS EEPROM-based |
| In-System Programmability (ISP) | — | Yes, IEEE Std. 1532 compliant |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) |
| Programming Interface | — | JTAG (ByteBlaster / MasterBlaster) |