EPM3032ATC44-10 vs EPM3032ATC44-10NAB Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3032ATC44-10 sa pamamagitan ng Altera at EPM3032ATC44-10NAB sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3032ATC44-10NAB - 32-Macrocell CPLD, 10ns, 3.3V | Intel (Altera)
EPM3032ATC44-10NAB ObsoletePagsanggunian na paghahambing
| Parametro | EPM3032ATC44-10 | EPM3032ATC44-10NAB |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | MAX 3000A | — |
| Family | CPLD MAX 3000A | — |
| Number of Macrocells | 32 | — |
| Number of Logic Array Blocks (LABs) | 2 | — |
| Number of Usable Gates | 600 | — |
| Number of I/O Pins | 34 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | — |
| I/O Voltage Tolerance | MultiVolt (1.8 V / 2.5 V / 3.3 V / 5.0 V) | — |
| Technology | CMOS EEPROM | — |
| In-System Programming | Yes (IEEE 1149.1 JTAG) | — |
| Packhaging | 44-pin TQFP (10x10 mm) | 44-pin TQFP |
| Temperature na Operasyon | 0 °C to +70 °C (commercial, 'C' grade) | [DATA_NEEDED: operating temperature range] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL Level] | — |
| Tindminan RoHS | Compliant | Compliant (per -NAB suffix convention) |
| Lead-Free | Yes | — |
| Product Family | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | — | 32 macrocells |
| Usable Gates | — | 600 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency | — | 103.1 MHz (per Arrow listing) |
| Number of User I/O | — | 34 (max for 44-pin TQFP package) |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V (MultiVolt I/O compatible with 5.0 V, 3.3 V, 2.5 V logic) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1 / IEEE Std. 1532 ISP) |
| Configuration Memory | — | Non-volatile EEPROM |
| Hot-Socketing Support | — | Yes |
| Delivery Form | — | Tray ('AB' suffix per Altera order code convention) |
| Process Technology | — | CMOS, EEPROM-based |