EPM3032ATC44-10AA vs EPM3032ATC44-10NAB Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3032ATC44-10AA sa pamamagitan ng Intel at EPM3032ATC44-10NAB sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3032ATC44-10NAB - 32-Macrocell CPLD, 10ns, 3.3V | Intel (Altera)
EPM3032ATC44-10NAB ObsoletePagsanggunian na paghahambing
| Parametro | EPM3032ATC44-10AA | EPM3032ATC44-10NAB |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | MAX 3000A | — |
| Family | CPLD - Complex Programmable Logic | — |
| Macro Cells | 32 | — |
| Logic Array Blocks (LABs) | 2 | — |
| Usable Gates | 600 | 600 |
| Number of I/O | 34 | — |
| Propagation Delay (tPD) | 10 ns (max, -10 speed grade) | — |
| Counter Frequency | 227.3 MHz (max) | — |
| Supply Voltage - Core (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | — |
| Supply Voltage - I/O (VCCIO) | 2.5 V / 3.3 V / 5.0 V selectable | — |
| Temperature na Operasyon | 0C to +70C (commercial, 'C' suffix) | [DATA_NEEDED: operating temperature range] |
| Packhaging | 44-TQFP (10 mm x 10 mm) | 44-pin TQFP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programmable Type | EEPROM (in-system programmable) | — |
| JTAG Interface | IEEE Std. 1149.1 boundary scan + IEEE Std. 1532 ISP | — |
| Tindminan RoHS | Compliant (lead-free 'A' suffix) | Compliant (per -NAB suffix convention) |
| Product Family | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | — | 32 macrocells |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency | — | 103.1 MHz (per Arrow listing) |
| Number of User I/O | — | 34 (max for 44-pin TQFP package) |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V (MultiVolt I/O compatible with 5.0 V, 3.3 V, 2.5 V logic) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1 / IEEE Std. 1532 ISP) |
| Configuration Memory | — | Non-volatile EEPROM |
| Hot-Socketing Support | — | Yes |
| Delivery Form | — | Tray ('AB' suffix per Altera order code convention) |
| Process Technology | — | CMOS, EEPROM-based |