EPM3064ALI44-10N vs EPM3064ATC44-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ALI44-10N sa pamamagitan ng Altera at EPM3064ATC44-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3064ALI44-10N | EPM3064ATC44-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Series | MAX 3000A | — |
| Programmable Type | In System Programmable (ISP) | — |
| Number of Macrocells | 64 | — |
| Number of I/O | 34 | — |
| Logic Gates | 1250 gates | — |
| Number of Logic Elements/Blocks | 4 LABs | — |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | — |
| Counter Frequency | up to 227.3 MHz | — |
| Supply Voltage - Core | 3.3 V | — |
| I/O Logic Level Support | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| Temperature na Operasyon | -40 C to +85 C (Industrial) | 0C to +70C (commercial) |
| Packhaging | 44-pin PLCC (J-Lead) | TQFP-44 (10x10 mm) |
| Uri ng Pagpapasok | Surface Mount (socketable PLCC) | Surface Mount |
| Lead Free / RoHS Status | Lead Free, RoHS Compliant | — |
| Hot-Socketing Support | Yes | — |
| Configuration Memory | CMOS EEPROM (non-volatile) | EEPROM (non-volatile) |
| Family | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 1250 |
| Macro Cells | — | 64 |
| User I/O Pins | — | 34 |
| Logic Array Blocks (LABs) | — | 4 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 192.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Standard | — | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) |
| In-System Programming | — | IEEE Std. 1532 compliant |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) compliant |
| Tindminan RoHS | — | Compliant |
| Pin-Locking | — | Yes (across design iterations) |