EPM3064ATC100-10N vs EPM3064ATC100-10NA Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC100-10N sa pamamagitan ng Altera at EPM3064ATC100-10NA sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3064ATC100-10N - MAX 3000A CPLD, 64 Macrocells, 66 I/O | Altera
EPM3064ATC100-10N ✓ NakahandaIntel
EPM3064ATC100-10NA - MAX 3000A CPLD, 64 Macrocells, 10ns, TQFP-100 | Intel (Altera)
EPM3064ATC100-10NA ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM3064ATC100-10N | EPM3064ATC100-10NA |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 2 | 4 |
| Maximum User I/O Pins | 66 | — |
| Usable Gates | 1,250 | 1,250 |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Supply Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | 3.3 V |
| In-System Programmability | Yes - IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | — |
| Boundary-Scan Test (BST) | Yes - JTAG compliant | — |
| Configuration Memory | Non-volatile EEPROM | Non-volatile EEPROM |
| Program/Erase Cycles | 100 minimum | — |
| MultiVolt I/O | Yes - 1.8 V / 2.5 V / 3.3 V / 5 V tolerant | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Packhaging | 100-pin TQFP | TQFP-100 (0.5 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | Compliant (lead-free) | — |
| User I/Os | — | 66 |
| Maximum Operating Frequency | — | [DATA_NEEDED: fMAX in MHz] |
| MultiVolt I/O Voltages | — | 2.5 V / 3.3 V / 5.0 V |
| In-System Programming | — | IEEE Std. 1532 compliant |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) |
| Lead-Free / RoHS | — | Yes (NA suffix) |