EPM3064ATC44-10N vs EPM3064ATC44-7 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC44-10N sa pamamagitan ng Altera at EPM3064ATC44-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPM3064ATC44-10N EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro EPM3064ATC44-10N EPM3064ATC44-7
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 1250 1.25K
Macro Cells 64 —
User I/O Pins 34 34
Logic Array Blocks (LABs) 4 —
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Counter Frequency 192.3 MHz 192.3 MHz
Supply Voltage (VCCINT) 3.3 V —
I/O Standard MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) —
Configuration Memory EEPROM (non-volatile) —
In-System Programming IEEE Std. 1532 compliant —
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) compliant —
Packhaging TQFP-44 (10x10 mm) TQFP-44
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon 0C to +70C (commercial) 0C to +70C (Commercial)
Tindminan RoHS Compliant unknown
Pin-Locking Yes (across design iterations) —
Macrocells — 64
Logic Array Blocks — 4
Bilang ng Pin — 44
Speed Grade — -7 (7.5 ns tPD)
Pin-to-Pin Propagation Delay — 7.5 ns
Supply Voltage (Core) — 3.3 V
I/O Logic Compatibility — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programming Interface — IEEE Std. 1149.1 JTAG (ISP)
Process Technology — CMOS EEPROM

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita