EPM3064ATC44-10N vs EPM3064ATI44-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC44-10N sa pamamagitan ng Altera at EPM3064ATI44-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3064ATC44-10N | EPM3064ATI44-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 1250 | — |
| Macro Cells | 64 | — |
| User I/O Pins | 34 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Maximum Counter Frequency | 192.3 MHz | 227.3 MHz |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Standard | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) compliant | — |
| Packhaging | TQFP-44 (10x10 mm) | TQFP-44 (10x10 mm, 0.8 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +70C (commercial) | -40C to +85C (Industrial) |
| Tindminan RoHS | Compliant | Non-Compliant (contains lead, per DigiChip listing) |
| Pin-Locking | Yes (across design iterations) | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Programmable Type | — | In-System Programmable (ISP), EEPROM-based |
| Number of Macrocells | — | 64 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Number of Usable Gates | — | 1,250 |
| Number of User I/O Pins | — | 34 |
| I/O Voltage Tolerance | — | 5.0 V tolerant (MultiVolt I/O) |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| ISP Standard | — | IEEE Std. 1532 |
| Lead Free Status | — | Contains Lead |
| Process Technology | — | CMOS, EEPROM |
| Programming Cycles | — | [DATA_NEEDED: typical program/erase endurance] |