EPM3064ATC44-4N vs EPM3064ATI44-4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC44-4N sa pamamagitan ng Altera at EPM3064ATI44-4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3064ATC44-4N | EPM3064ATI44-4N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 64 | — |
| Logic Array Blocks | 2 | — |
| Number of I/Os | 34 | — |
| Dedicated Inputs | 4 | — |
| Usable Gates | 1,250 | 1,250 gates |
| Propagation Delay (tpd) | 4.5 ns | — |
| Maximum Counter Frequency | 222.2 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V or 3.3 V | — |
| Programmability | EEPROM, in-system programmable (JTAG) | — |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Packhaging | 44-pin TQFP | 44-pin TQFP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: rohs status] |
| Logic Elements / Macrocells | — | 64 macrocells |
| Number of Logic Array Blocks (LABs) | — | 4 LABs (16 macrocells each) |
| Maximum Operating Frequency | — | 222.2 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 4.5 ns (-4 speed grade) |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| Supply Voltage - I/O (VCCIO) | — | 3.3 V or 2.5 V |
| User I/O Pins | — | 34 I/O |
| Programming Interface | — | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP |
| Configuration Memory | — | EEPROM (non-volatile) |