EPM3064ATC44-7N vs EPM3064ATI44-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC44-7N sa pamamagitan ng Altera at EPM3064ATI44-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3064ATC44-7N | EPM3064ATI44-7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 64 | — |
| Logic Array Blocks | 2 | — |
| Usable Gates | 1,250 | 1,250 |
| User I/O Pins | 34 | — |
| Bilang ng Pins | 44 | — |
| Speed Grade | -7 (7.5 ns pin-to-pin delay) | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Maximum Counter Frequency | 192.3 MHz (-7 grade) | — |
| Supply Voltage (VCC) | 3.3 V | — |
| MultiVolt I/O | 1.8 V / 2.5 V / 3.3 V | — |
| Programmability | EEPROM, in-system programmable (ISP) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| ISP Standard | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test (BST) | Built-in, JTAG-driven | — |
| Packhaging | 44-pin TQFP | 44-pin TQFP (TI44) |
| Temperature na Operasyon | 0°C to +85°C (commercial) | -40 °C to +85 °C (Industrial, 'I' suffix) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 64 |
| User I/O | — | 34 |
| Logic Array Blocks (LABs) | — | 4 (16 macrocells each) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 135.1 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | — | 3.0 V to 3.6 V |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| In-System Programmability | — | Yes, IEEE Std. 1532 compliant |
| JTAG Support | — | Yes (IEEE 1149.1) |
| PCI Compliance | — | Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2 |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |