EPM3128ATC100-7 vs EPM3128ATC100-10NS Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATC100-7 sa pamamagitan ng Intel at EPM3128ATC100-10NS sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3128ATC100-7 EPM3128ATC100-10NS
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 128 128
Typical Gates 2500 —
User I/Os 80 80
Logic Elements / LABs 4 Logic Array Blocks (LABs) —
Propagation Delay (tPD) 7.5 ns —
Counter Frequency (fCNT) 129.9 MHz up to 227.3 MHz
Supply Voltage (VCCINT) 3.3 V —
I/O Voltage Tolerance 5.0 V tolerant inputs —
Programming Technology EEPROM (non-volatile, in-system programmable) —
ISP Standard IEEE Std. 1532 (JTAG) —
Packhaging 100-pin TQFP, 14x14 mm, 0.5 mm pitch TQFP-100
Temperature na Operasyon 0C to +70C (Commercial) [DATA_NEEDED: operating temperature range]
Speed Grade -7 (fastest grade in family) —
Process Technology CMOS EEPROM —
Tindminan RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free status]
Bilang ng Pin — 100
Pin-to-Pin Logic Delay (tPD) — 10 ns
Supply Voltage - Core (VCCINT) — 3.3 V
Supply Voltage - I/O (VCCIO) — 3.3 V or 2.5 V (5.0 V-tolerant inputs)
Logic-Level Compatibility — 5.0 V, 3.3 V, 2.5 V
Programmability — In-system (ISP), IEEE Std. 1532
Boundary Scan — IEEE 1149.1 JTAG
Configuration Memory — EEPROM (non-volatile)
Uri ng Pagpapasok — Surface Mount

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