EPM3128ATC100-7N vs EPM3128ATI100-5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATC100-7N sa pamamagitan ng Intel at EPM3128ATI100-5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3128ATC100-7N - MAX 3000A 128-Macrocell CPLD, 7.5 ns, TQFP-100 | Intel (Altera)
EPM3128ATC100-7N NrndIntel
EPM3128ATI100-5N - MAX 3000A CPLD, 128 Macrocells, TQFP-100 | Intel / Altera
EPM3128ATI100-5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM3128ATC100-7N | EPM3128ATI100-5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Presyo ng Yunit (USD) | $3.52 | — |
| Family | MAX 3000A | MAX 3000A |
| Macro Cells | 128 | — |
| Usable Gates | Up to 10,000 | — |
| Number of I/Os | 80 | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Counter Frequency (max) | 227.3 MHz | — |
| Supply Voltage - Core | 3.3 V | — |
| I/O Interface Levels | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) | — |
| In-System Programmability | Yes (IEEE 1532 / JTAG) | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | -40C to +85C (Industrial) |
| Packhaging | TQFP-100 (100-pin TQFP, fine-line BGA-256 noted in third-party listings) | 100-pin TQFP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Logic Family | CMOS | — |
| Speed Grade | -7 | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (lead-free TQFP package) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells per LAB) |
| User I/O Pins | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 5.0 ns |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Standard | — | 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs |
| Programming Method | — | In-System Programmable via IEEE Std. 1532 (JTAG) |
| Configuration Memory | — | Non-volatile EEPROM |
| JTAG Support | — | IEEE 1149.1 boundary scan |