EPM3128ATC144-10 vs EPM3128ATC100-10N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATC144-10 sa pamamagitan ng Altera at EPM3128ATC100-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3128ATC144-10 EPM3128ATC100-10N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo NRND
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 128
User I/Os 96 —
Usable Gates 2,500 (typical) 2500
Logic Elements / LABs 4 Logic Array Blocks —
Propagation Delay (tPD) 10 ns (speed grade -10) 10 ns
Counter Frequency (fCNT) Up to 227.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
MultiVolt I/O Interface 1.5V / 1.8V / 2.5V / 3.3V —
In-System Programmability IEEE Std. 1532 compliant —
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) —
Configuration Memory EEPROM (non-volatile, instant-on) CMOS EEPROM (non-volatile, instant-on)
Packhaging 144-pin TQFP (TQ144) 100-pin TQFP (14 x 14 x 1.0 mm)
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon 0C to +70C (commercial) 0 °C to +70 °C (commercial)
Tindminan RoHS Compliant Compliant
Lead-Free Yes Yes
Product Type — CPLD (Complex Programmable Logic Device)
Number of I/O — 80
Logic Elements / Blocks — 8 LABs (16 macrocells each)
Maximum Internal Frequency (fMAX) — 98 MHz
Supply Voltage VCCINT — 3.3 V
I/O Bank Voltage VCCIO — 3.3 V or 2.5 V (selectable)
In-System Programming — IEEE Std. 1532-compliant ISP via JTAG
Level ng MSL — 3 (per JEDEC J-STD-020)

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