EPM3128ATC144-5N vs EPM3128ATC144-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATC144-5N sa pamamagitan ng Altera at EPM3128ATC144-7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3128ATC144-5N | EPM3128ATC144-7 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Logic Family | CMOS | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2500 | 2,500 |
| User I/O | 96 | — |
| Pin-to-Pin Logic Delay | 5 ns | — |
| Counter Frequency | up to 227.3 MHz | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Logic Levels Supported | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| In-System Programmability | Yes (3.3-V via JTAG) | — |
| JTAG Boundary Scan | IEEE Std 1149.1 compliant | — |
| Packhaging | 144-pin TQFP (20x20 mm) | TQFP-144 (22x22 mm) |
| Temperature na Operasyon | 0C to 70C (Commercial) | 0C to +70C (Commercial) |
| Tindminan RoHS | Compliant (lead-free) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells each) |
| User I/Os | — | 96 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Speed Grade | — | -7 |
| Pin-to-Pin Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fCNT) | — | 129.9 MHz |
| Programming Technology | — | CMOS EEPROM (in-system programmable) |
| JTAG Support | — | IEEE 1149.1 boundary-scan + ISP |
| Process Technology | — | CMOS EEPROM |