EPM3256AFC256-10 vs EPM3512AFC256-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3256AFC256-10 sa pamamagitan ng Altera at EPM3512AFC256-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3256AFC256-10 - 256-Macro CPLD MAX 3000A | Intel / Altera | FBGA-256
EPM3256AFC256-10 ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EPM3256AFC256-10 | EPM3512AFC256-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | MAX 3000A | MAX 3000A |
| Logic Family | CMOS (EEPROM-based) | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 256 | — |
| Usable Gates | 5,000 | 10,000 |
| Logic Array Blocks (LABs) | 16 (16 macrocells each) | 16 |
| Maximum User I/Os | 161 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Internal Counter Frequency (fCNT) | 95.2 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Voltage Tolerance | 5.0 V tolerant | 5-V tolerant |
| In-System Programmability | Yes (3.3 V ISP via JTAG IEEE 1149.1) | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| Temperature na Operasyon | 0°C to +70°C (Commercial) | — |
| Packhaging | 256-ball FBGA (Fine-Line BGA) | 256-pin FBGA |
| Pitch | [DATA_NEEDED: BGA ball pitch] | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | unknown |
| Macrocells | — | 512 |
| Maximum I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 87 MHz |
| Programmable Technology | — | CMOS EEPROM |
| Hanay ng Temperature na Operasyon | — | [DATA_NEEDED: industrial/commercial operating temperature range] |
| Bilang ng Pin | — | 256 |
| Architecture | — | MAX (Multiple Array matriX) EEPROM-based |