EPM3256AFC256-10N vs EPM3512AFC-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3256AFC256-10N sa pamamagitan ng Altera at EPM3512AFC-7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3512AFC-7N - 512-Macrocell MAX 3000A CPLD, 7.5ns, BGA-256 | Intel (Altera)
EPM3512AFC-7N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM3256AFC256-10N | EPM3512AFC-7N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 5,000 gates | — |
| Macrocells | 256 | 512 |
| Maximum User I/O | 161 | — |
| Pin-to-Pin Logic Delay | 10 ns | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Core Voltage | 3.3 V | — |
| I/O Logic Level Compatibility | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Programmability | EEPROM, in-system programmable (ISP) | — |
| JTAG Interface | IEEE 1532 / JTAG (TDI, TDO, TMS, TCK) | — |
| Packhaging | 256-pin FineLine BGA | BGA-256 (FineLine BGA) |
| Logic Family | CMOS | CMOS, EEPROM-based |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 (at -10 grade) | — |
| Temperature na Operasyon | 0 C to 70 C (commercial) | 0 C to +70 C (commercial) |
| Logic Array Blocks (LABs) | — | 16 |
| User I/Os | — | 208 |
| Dedicated Inputs | — | 16 |
| Propagation Delay (tPD) | — | 7.5 ns (speed grade -7) |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant |
| In-System Programmability | — | Yes - IEEE Std. 1532 / JTAG (IEEE 1149.1) |
| Programming Interface | — | JTAG (4-wire TCK/TMS/TDI/TDO) |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |