EPM3256ATC144-10AA vs EPM3256ATC144-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3256ATC144-10AA sa pamamagitan ng Altera at EPM3256ATC144-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3256ATC144-10AA - MAX 3000A CPLD, 256 Macrocells, 10ns TQFP-144 | Altera
EPM3256ATC144-10AA ObsoletePagsanggunian na paghahambing
| Parametro | EPM3256ATC144-10AA | EPM3256ATC144-7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | — |
| Propagation Delay (tPD) | 10 ns | 7.5 ns |
| User I/O Pins | 116 | — |
| Maximum Operating Frequency | 95.2 MHz | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V | — |
| Technology | CMOS, EEPROM-based configuration | — |
| Packhaging | 144-pin TQFP | TQFP-144 (LFQFP, gull-wing) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| In-System Programming | IEEE Std. 1532 compliant | IEEE Std. 1532 compliant, 3.3 V ISP |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| User I/Os | — | 116 |
| Logic Elements / Gates | — | 600 to 10,000 usable gates |
| Counter Frequency (fCNT) | — | 227.3 MHz |
| Speed Grade | — | -7 |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| Supply Voltage - I/O (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V |
| Bilang ng Pin | — | 144 |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 (speed grades -4 to -10) |
| JTAG Support | — | IEEE Std. 1149.1 boundary-scan |