EPM3256ATC144-7N vs EPM3256ATC144-10AA Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3256ATC144-7N sa pamamagitan ng Altera at EPM3256ATC144-10AA sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3256ATC144-10AA - MAX 3000A CPLD, 256 Macrocells, 10ns TQFP-144 | Altera
EPM3256ATC144-10AA ObsoletePagsanggunian na paghahambing
| Parametro | EPM3256ATC144-7N | EPM3256ATC144-10AA |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD - Complex Programmable Logic Device |
| Macro Cells | 256 | — |
| Logic Gates (usable) | 5,000 | — |
| Number of Logic Array Blocks (LABs) | 16 | — |
| User I/Os | 116 | — |
| Propagation Delay (tPD) | 7.5 ns | 10 ns |
| Maximum Internal Frequency | 126.6 MHz | — |
| Supply Voltage (VCCIO) | 3.0 V to 3.6 V | — |
| Programmable Logic Technology | CMOS EEPROM-based | — |
| In-System Programmable (ISP) | Yes (3.3 V) | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| Packhaging | 144-pin TQFP | 144-pin TQFP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Logic Family | CMOS | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Macrocells | — | 256 |
| Usable Gates | — | 5,000 |
| User I/O Pins | — | 116 |
| Maximum Operating Frequency | — | 95.2 MHz |
| Core Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V |
| Technology | — | CMOS, EEPROM-based configuration |
| In-System Programming | — | IEEE Std. 1532 compliant |