EPM3256ATI144-7N vs EPM3256ATC144-7N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3256ATI144-7N sa pamamagitan ng Altera at EPM3256ATC144-7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPM3256ATC144-7N EPM3256ATC144-7N - MAX 3000A CPLD 256 Macro 7.5ns | Altera

EPM3256ATC144-7N - MAX 3000A CPLD 256 Macro 7.5ns | Altera

EPM3256ATC144-7N ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EPM3256ATI144-7N EPM3256ATC144-7N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Huling Pagbili
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD - Complex Programmable Logic Device
Macrocells 256 —
Usable Gates 5,000 —
Logic Array Blocks (LABs) 16 —
Maximum User I/O Pins 116 —
Propagation Delay (tPD) 7.5 ns (typical) 7.5 ns
Maximum Internal Frequency 126.6 MHz 126.6 MHz
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 2.5 V —
MultiVolt I/O Logic Levels 5.0 V / 3.3 V / 2.5 V —
Programming Technology EEPROM (in-system programmable) —
JTAG / ISP IEEE Std. 1532 compliant —
Boundary Scan IEEE Std. 1149.1 (JTAG) —
Hot-Socketing Support Yes —
Packhaging TQFP-144 (20 x 20 mm, 0.5 mm pitch) 144-pin TQFP
Temperature na Operasyon -40C to +85C (industrial) 0C to +70C (Commercial)
Tindminan RoHS Compliant (lead-free) Compliant
Macro Cells — 256
Logic Gates (usable) — 5,000
Number of Logic Array Blocks (LABs) — 16
User I/Os — 116
Supply Voltage (VCCIO) — 3.0 V to 3.6 V
Programmable Logic Technology — CMOS EEPROM-based
In-System Programmable (ISP) — Yes (3.3 V)
Uri ng Pagpapasok — Surface Mount
Logic Family — CMOS
JTAG Support — IEEE 1149.1 boundary-scan

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