EPM3512AFC-7N vs EPM3512AFC256-10N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512AFC-7N sa pamamagitan ng Intel at EPM3512AFC256-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3512AFC-7N EPM3512AFC256-10N
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 512 512
Logic Array Blocks (LABs) 16 [DATA_NEEDED: number of LABs]
User I/Os 208 —
Dedicated Inputs 16 —
Propagation Delay (tPD) 7.5 ns (speed grade -7) —
Packhaging BGA-256 (FineLine BGA) 256-ball FBGA (17 mm x 17 mm)
Logic Family CMOS, EEPROM-based —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant —
In-System Programmability Yes - IEEE Std. 1532 / JTAG (IEEE 1149.1) —
Programming Interface JTAG (4-wire TCK/TMS/TDI/TDO) —
Temperature na Operasyon 0 C to +70 C (commercial) —
Uri ng Pagpapasok Surface Mount (BGA) Surface Mount (BGA)
Tindminan RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Usable Gates — 10000
User I/O Pins — 208
Operating Frequency (fMAX) — [DATA_NEEDED: fMAX MHz]
Pin-to-Pin Delay (tPD) — 10 ns
Setup Time (tSU) — 4.5 ns
VCCINT (Core Supply) — 3.3 V
VCCIO (I/O Supply) — 3.3 V or 2.5 V
Technology — CMOS EEPROM-based, non-volatile
Operating Temperature (Commercial) — 0 C to +70 C
ISP Interface — IEEE Std. 1149.1 JTAG, IEEE Std. 1532
Level ng MSL — [DATA_NEEDED: MSL rating]

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