EPM3512AFC256-7 vs EPM3512AFC256-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512AFC256-7 sa pamamagitan ng Intel at EPM3512AFC256-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3512AFC256-7 - 512-Macrocell MAX 3000A CPLD, 7.5ns, BGA-256 | Intel
EPM3512AFC256-7 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM3512AFC256-7 | EPM3512AFC256-3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/O Pins | 212 | — |
| Usable Gates | 10,000 | 10,000 |
| Pin-to-Pin Logic Delay | 7.5 ns | — |
| Counter Frequency (max) | 227.3 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.0 V to 3.6 V (3.3 V typ.) | — |
| I/O Voltage (VCCIO) | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Packhaging | 256-ball FineLine BGA (FBGA-256) | 256-ball FineLine BGA (FC-256) |
| Programming | EEPROM, IEEE 1149.1 JTAG ISP (IEEE 1532-compliant) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature grade] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Configuration Memory | Non-volatile EEPROM | Non-volatile EEPROM |
| Maximum Operating Frequency | — | 116.3 MHz |
| Pin-to-Pin Delay (tPD) | — | 3.5 ns (speed grade -3) |
| Speed Grade | — | -3 (slowest in family) |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Programming Interface | — | JTAG (IEEE 1149.1) / IEEE Std. 1532 ISP |