EPM3512AFI256-10N vs EPM3512AFC256-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512AFI256-10N sa pamamagitan ng Altera at EPM3512AFC256-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3512AFI256-10N - 512-Macro MAX 3000A CPLD, 256-FBGA | Intel/Altera
EPM3512AFI256-10N ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EPM3512AFI256-10N | EPM3512AFC256-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | MAX 3000A | MAX 3000A |
| Series | EPM3512 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | CMOS EEPROM-based, MAX architecture | MAX (Multiple Array matriX) EEPROM-based |
| Number of Macrocells | 512 | — |
| Number of Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | Up to 10,000 | 10,000 |
| Number of User I/O | 208 | — |
| Total Pins | 256 | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 227.3 MHz | 87 MHz |
| Core Supply Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | — |
| I/O Supply Voltage (VCCIO) | 2.5 V or 3.3 V (5.0 V tolerant inputs) | — |
| MultiVolt I/O Support | 5.0 V / 3.3 V / 2.5 V | — |
| In-System Programmability | Yes - IEEE Std 1532 compliant | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| JTAG Boundary Scan | Yes - IEEE 1149.1 | — |
| Program Memory | EEPROM (non-volatile) | — |
| Packhaging | 256-ball FineLine BGA (FBGA-256) | 256-pin FBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Hanay ng Temperature na Operasyon | -40 °C to +85 °C (industrial) | [DATA_NEEDED: industrial/commercial operating temperature range] |
| Tindminan RoHS | Compliant | unknown |
| Speed Grade | -10 (10 ns tPD) | — |
| Macrocells | — | 512 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5-V tolerant |
| Programmable Technology | — | CMOS EEPROM |
| Bilang ng Pin | — | 256 |