EPM3512AQC20810N vs EPM3512AQC208-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512AQC20810N sa pamamagitan ng Altera at EPM3512AQC208-7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3512AQC208-7N - 512-Macro MAX 3000A CPLD, 208-PQFP | Altera
EPM3512AQC208-7N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM3512AQC20810N | EPM3512AQC208-7N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 512 | — |
| Usable Gates | 10,000 | — |
| User I/Os | 172 | 172 |
| Logic Array Blocks (LABs) | 16 | 32 |
| Propagation Delay (tPD) | 10 ns | 7.5 ns |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 3.3 V (5.0 V tolerant I/O) | — |
| Packhaging | 208-pin PQFP (Plastic Quad Flat Pack) | 208-Pin PQFP / FQFP-208 (Plastic Quad Flat Pack, gull-wing) |
| Configuration Memory | EEPROM (non-volatile, instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532 ISP) | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Temperature na Operasyon | [DATA_NEEDED: industrial/commercial grade range] | 0 °C to +70 °C (commercial) |
| Tindminan RoHS | [DATA_NEEDED: lead-free/RoHS status] | Compliant |
| Uri ng Pagpapasok | Surface Mount | — |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Logic Capacity | — | 512 macrocells, 10,000 usable gates |
| Macrocells per LAB | — | 16 |
| Maximum Frequency (fCNT) | — | 116.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V (3.0 V to 3.6 V) |
| I/O Bank Count | — | 4 (MultiVolt) |
| Supported I/O Standards | — | 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| Configuration | — | Non-volatile EEPROM, in-system programmable (ISP) |
| JTAG Interface | — | IEEE 1149.1 BST + IEEE 1532 ISP |
| Speed Grade | — | -7 |