EPM3512ATI256-10N vs EPM3512AFC256-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512ATI256-10N sa pamamagitan ng Intel at EPM3512AFC256-7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3512AFC256-7N - MAX 3000A CPLD, 512 Macrocells, 208 I/O | Altera
EPM3512AFC256-7N ObsoletePagsanggunian na paghahambing
| Parametro | EPM3512ATI256-10N | EPM3512AFC256-7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Intel (formerly Altera Corporation) | — |
| Family | MAX 3000A | MAX 3000A |
| Device | EPM3512A | — |
| Macrocells | 512 | 512 |
| Usable Gates | 10,000 | 10,000 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O | 212 | — |
| Speed Grade | -10 (10 ns pin-to-pin delay) | — |
| Packhaging | 256-pin BGA (TI256) | 256-pin FineLine BGA (FBGA-256), 1.0 mm pitch |
| Temperature na Operasyon | -40C to +85C (Industrial) | 0 C to 70 C (commercial) |
| Core Voltage | 3.3 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Programming Technology | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan, 4-pin JTAG | — |
| Programmable Security Bit | Yes (design protection) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Katayuan ng Lifecycle | Obsolete / Last Time Buy (per Altera product discontinuation notices) | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| User I/Os | — | 208 |
| Logic Blocks | — | 16 (32 macrocells each) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 116.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| 5V Tolerant I/O | — | Yes |
| In-System Programmability | — | IEEE Std. 1532 compliant |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Process Technology | — | CMOS EEPROM, 0.30 um |