EPM5032DC-15 vs EPM5016DC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5032DC-15 sa pamamagitan ng Altera at EPM5016DC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 Obsolete
Pagsanggunian na paghahambing
| Parametro | EPM5032DC-15 | EPM5016DC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | UV-erasable EPLD (PAL-type CMOS) | — |
| Usable Gates | 600 | — |
| Macrocells | 32 | 16 |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (nominal) | 4.75 V to 5.25 V |
| Logic Family | CMOS, TTL-compatible I/O | — |
| Programmable Pins | 16 bidirectional I/O + 4 dedicated input = 20 | — |
| Total Package Pins | 28 | — |
| Packhaging | CERDIP-28 (windowed, through-hole) | Ceramic DIP-24 (windowed) |
| Uri ng Pagpapasok | Through-Hole (DIP) | Through-Hole |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 °C to 70 °C (commercial) |
| Erasure Method | UV light through ceramic quartz window | — |
| Process Technology | CMOS | CMOS EPROM |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - pre-RoHS era part, likely non-compliant] |
| Lead-Free | unknown | — |
| Device Family | — | MAX 5000 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 2 |
| Dedicated Inputs | — | 4 |
| User I/O Pins | — | 12 |
| Pin-to-Pin Delay (tpd) | — | 15 ns |
| Maximum Frequency (fmax) | — | 71 MHz |
| Programming Voltage (VPP) | — | 12.75 V |
| Configuration Memory | — | Non-volatile UV-erasable EPROM |
| Lead Finish | — | [DATA_NEEDED: lead-free status] |