EPM5032DI25 vs EPM5032DM Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5032DI25 sa pamamagitan ng Altera at EPM5032DM sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5032DI25 | EPM5032DM |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | — |
| Product Terms | 320 | — |
| Output Macrocells | 16 | — |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (typical) |
| I/O Standard | TTL-compatible | — |
| Packhaging | 24-pin Ceramic DIP (DI) with quartz window | CDIP-28 (ceramic windowed DIP, 28-pin) |
| Programming Technology | UV-EPROM (erasable via quartz window) | UV-erasable (windowed) EEPROM |
| Device Family | — | MAX 5000 |
| Propagation Delay (tPD) | — | 25 ns |
| Usable Gates | — | 600 to 1000 (typical) |
| Logic Inputs | — | 32 |
| Process Technology | — | CMOS EEPROM |
| Standby Current | — | [DATA_NEEDED: ICC standby current] |
| Temperature na Operasyon | — | -55C to +125C (military/extended, ceramic package) |
| Logic Function | — | Combinational and registered (synchronous) |
| Output Polarity | — | Programmable |
| Program Retention | — | Non-volatile (EEPROM) |
| Uri ng Pagpapasok | — | Through-hole (DIP) |
| Tindminan RoHS | — | Non-compliant (ceramic DIP with UV window) |
| Lead-Free | — | No (ceramic DIP contains lead) |