EPM5128JI vs EPM5128JI-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5128JI sa pamamagitan ng Intel at EPM5128JI-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5128JI | EPM5128JI-2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Device Family | MAX 5000 | — |
| Device Type | UV-erasable programmable logic device (PLD) | UV-Erasable Programmable Logic Device (PLD) |
| Macrocells | 128 | 128 |
| Propagation Delay (tPD) | 55 ns (typical) | 45 ns |
| Maximum Internal Frequency | 40 MHz | — |
| Process Technology | CMOS | CMOS EPROM |
| Programmable Technology | UV-erasable EPROM cell | — |
| Packhaging | 68-terminal ceramic CQCC, windowed, J-leads | — |
| Operating Temperature Grade | Industrial ("I" suffix) | — |
| Programming | Altera MAX+plus II compatible programmer + UV eraser | — |
| Tindminan RoHS | Non-compliant (ceramic hermetic package) | unknown |
| Lead Finish | Tin-lead (SnPb) over nickel | — |
| Uri ng Pagpapasok | Surface Mount (J-lead CQCC) | — |
| Logic Blocks | [DATA_NEEDED: number of LABs / logic array blocks] | — |
| User I/O Pins | [DATA_NEEDED: pin count of user I/Os] | 52 |
| Volte ng Pagbibigay | [DATA_NEEDED: VCC range] | — |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Series | — | MAX 5000 |
| Dedicated Inputs | — | 7 |
| Maksimum na Taktiko ng Oras | — | 50 MHz |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| Temperature na Operasyon | — | -40 C to +85 C (industrial) |
| Package Type | — | Ceramic J-Lead (JI) with UV window |
| Programmability | — | UV-erase, parallel programmer |
| Architecture | — | LAB-based macrocell, segmented interconnect |
| Speed Grade | — | -2 (industrial-speed) |
| Lead-Free | — | unknown |