EPM5192AGC84-15 vs EPM5192AJC84-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192AGC84-15 sa pamamagitan ng Altera at EPM5192AJC84-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM5192AJC84-15 - MAX 5000 CPLD, 192 Macrocells, 84-pin PLCC | Altera
EPM5192AJC84-15 ObsoletePagsanggunian na paghahambing
| Parametro | EPM5192AGC84-15 | EPM5192AJC84-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-Erasable/OTP Complex PLD | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Internal Clock Frequency | 83.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | 5 V (single supply) |
| Process Technology | CMOS | CMOS EPROM |
| Programmable Element | UV-Erasable EPROM cell | — |
| Packhaging | 84-pin Ceramic PGA (Pin Grid Array) | 84-pin PLCC (J84C) windowed ceramic |
| Uri ng Pagpapasok | Through-Hole | Surface Mount |
| Temperature na Operasyon | Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] | [DATA_NEEDED: commercial/industrial/military grade] |
| Tindminan RoHS | [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] | Non-compliant (contains Pb, ceramic windowed package) |
| Propagation Delay (tpd) | — | 15 ns |
| Maximum Clock Frequency (fMAX) | — | 83.3 MHz |
| Technology | — | CMOS, UV-erasable EPROM |
| Programming Method | — | UV-erase + EPROM programming (windowed package) |
| Logic Blocks | — | 16 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: user I/O count] |