EPM5192AJM84-20 vs EPM5192AJC84-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192AJM84-20 sa pamamagitan ng Altera at EPM5192AJC84-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 ObsoletePagsanggunian na paghahambing
| Parametro | EPM5192AJM84-20 | EPM5192AJC84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 5000 (EPM5192) | — |
| Device Type | CMOS UV-Erasable/OTP Complex PLD | UV-erasable/OTP Complex PLD (CPLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 7 |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| Maksimum na Taktiko ng Oras | 66.7 MHz | 66.7 MHz |
| Propagation Delay (tPD) | 33 ns (speed grade -20) | — |
| Packhaging | 84-pin CQFP (S-CQCC-J84, J-lead) | 84-pin PLCC J-Lead (WQCCJ, J84) |
| Terminal Form | J-Bend | — |
| Temperature Grade | MILITARY | — |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS, UV-erasable EEPROM |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Erasure Method | UV (quartz-windowed CQFP) or OTP | — |
| Family | — | MAX 5000 |
| Propagation Delay (tpd) | — | 33 ns (speed grade -20) |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V |
| User I/O Lines | — | 64 |
| Operating Temperature Grade | — | Commercial |
| Uri ng Pagpapasok | — | Surface Mount (J-Lead) |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Programming Tool | — | Altera MAX+PLUS II / Quartus (legacy) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |