EPM5192AQI100-20 vs EPM5192AQC-2 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192AQI100-20 sa pamamagitan ng Altera at EPM5192AQC-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192AQI100-20 EPM5192AQC-2
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 5000 EPLD —
Device Series EPM5192 —
Technology CMOS, UV-erasable EPROM —
Propagation Delay 20 ns (speed grade -20) —
Logic Array Blocks (LABs) 12 —
Interconnect Programmable Interconnect Array (PIA) —
Macrocell Count 192 —
Dedicated Inputs 7 7
I/O Pins 64 bidirectional —
Packhaging 100-pin PQFP (R-PQFP-G100) 100-pin PQFP (R-PQFP-G100)
JEDEC Package Outline R-PQFP-G100 —
Temperature na Operasyon Industrial grade ("I" suffix) [DATA_NEEDED: commercial / industrial / military grade]
Uri ng Pagpapasok Surface Mount (PQFP) Surface Mount
Architecture Classic EPLD, deterministic timing —
Design Tool Altera MAX+PLUS II (legacy) —
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: confirmed compliance status]
Volte ng Pagbibigay [DATA_NEEDED: VCC range] —
Device Type — UV-Erasable / OTP Complex PLD (CPLD)
Series — MAX 5000 (EPM5192)
Macrocells — 192
User I/O Pins — 64
Total Inputs — 72
Propagation Delay (tPD) — 45 ns (-2 speed grade)
Maksimum na Taktiko ng Oras — [DATA_NEEDED: max fMAX for -2 grade]
Process Technology — CMOS
Switch Matrix — UV-Erasable / OTP (windowless on AQC package)
Lead Pitch — 0.635 mm
Terminal Form — Gull-wing
Programming Interface — JTAG (IEEE 1149.1) boundary scan

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