EPM5192GC-1 vs EPM5192C-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GC-1 sa pamamagitan ng Altera at EPM5192C-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192GC-1 | EPM5192C-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 (Classic) | MAX 5000 |
| Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 3,750 | — |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| Maximum Propagation Delay (tPD) | 40 ns | — |
| Maximum Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Process Technology | CMOS, UV-erasable / OTP | CMOS |
| Packhaging | 100-pin Ceramic PGA (GC) | — |
| Uri ng Pagpapasok | Through-Hole (PGA) | — |
| Configuration Method | UV-Erase / One-Time Programmable | — |
| Interconnect | Peripheral Interconnect Array (PIA) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| External Clock Inputs | — | 1 |
| Propagation Delay (PIA, typical) | — | 45 ns |
| Maximum Operating Frequency | — | 50 MHz |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Speed Grade | — | -2 |
| Programming Interface | — | JTAG / Altera MAX+ programming |
| Lead-Free | — | unknown |