EPM5192GC1 vs EPM5192GC-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GC1 sa pamamagitan ng Altera at EPM5192GC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192GC1 | EPM5192GC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 (Classic) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 192 | — |
| Usable Gates | 3,750 | 3,750 |
| Maximum Operating Frequency | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V |
| Programming Technology | UV-Erasable / OTP EPROM | — |
| Package Type | Ceramic PGA (Pin Grid Array) | — |
| Logic Elements | 192 macrocells with AND/OR array | — |
| Process Technology | EPROM-based CMOS | CMOS, UV-erasable / OTP |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature grade] |
| Propagation Delay | [DATA_NEEDED: tpd specification] | — |
| Bilang ng Pins | [DATA_NEEDED: pin count for GC1 PGA package] | — |
| Uri ng Pagpapasok | Through-hole (PGA) | Through-Hole (PGA) |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Development Tool | Altera MAX+PLUS II | — |
| Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 12 |
| Dedicated Inputs | — | 7 |
| User I/O Pins | — | 64 |
| Maximum Propagation Delay (tPD) | — | 40 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Packhaging | — | 100-pin Ceramic PGA (GC) |
| Configuration Method | — | UV-Erase / One-Time Programmable |
| Interconnect | — | Peripheral Interconnect Array (PIA) |