EPM5192GI-1 vs EPM5192GC1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GI-1 sa pamamagitan ng Altera at EPM5192GC1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192GI-1 | EPM5192GC1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Architecture | PAL-type, UV-erasable CMOS | — |
| Macrocells | 192 | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5.0 V | 5 V |
| Temperature na Operasyon | -40C to +85C (Industrial) | [DATA_NEEDED: operating temperature range] |
| Packhaging | 84-pin PGA (Pin Grid Array), windowed ceramic | — |
| Configuration Memory | UV-EPROM (windowed ceramic PGA) | — |
| Process Technology | CMOS | EPROM-based CMOS |
| Tindminan RoHS | unknown (legacy UV-windowed package) | unknown |
| Macro Cells | — | 192 |
| Usable Gates | — | 3,750 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Programming Technology | — | UV-Erasable / OTP EPROM |
| Package Type | — | Ceramic PGA (Pin Grid Array) |
| Logic Elements | — | 192 macrocells with AND/OR array |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| Bilang ng Pins | — | [DATA_NEEDED: pin count for GC1 PGA package] |
| Uri ng Pagpapasok | — | Through-hole (PGA) |
| Development Tool | — | Altera MAX+PLUS II |