EPM5192GM883B vs EPM5192JC-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GM883B sa pamamagitan ng Intel at EPM5192JC-1N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192GM883B | EPM5192JC-1N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-erasable) | CPLD - Complex Programmable Logic Device |
| Macrocells | 192 | 192 |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| Nominal Supply Voltage (VCC) | 5 V | — |
| Maksimum na Taktiko ng Oras | 33.3 MHz | — |
| Propagation Delay (tpd) | 55 ns | — |
| Packhaging | 84-terminal CPGA (Ceramic Pin Grid Array) | 84-pin Ceramic Quad Flat Pack (CQFP) |
| Package Body Size | 28.45 mm square | — |
| Process Technology | CMOS | — |
| Uri ng Pagpapasok | Through-Hole (PGA) | — |
| Military Screening | MIL-STD-883 Revision B | — |
| Programming Technology | UV-EPROM (non-volatile) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Logic Array Blocks (LABs) | — | 12 |
| Usable Gates | — | 3750 |
| External Clock Inputs (GCLK) | — | 1 |
| Propagation Delay (tPD) | — | 40 ns |
| Maximum Clock Frequency (fMAX) | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Technology | — | CMOS EPROM (UV-erasable) |
| JEDEC Package Code | — | S-CQCC-J84 |
| Temperature na Operasyon | — | [DATA_NEEDED: industrial/commercial temperature range] |
| Programming Interface | — | JTAG / Altera ByteBlaster |