EPM5192GM883B vs EPM5192JI-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GM883B sa pamamagitan ng Intel at EPM5192JI-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192GM883B | EPM5192JI-2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-erasable) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 192 | 192 |
| Dedicated Inputs | 7 | 12 |
| User I/O Pins | 64 | — |
| Nominal Supply Voltage (VCC) | 5 V | — |
| Maksimum na Taktiko ng Oras | 33.3 MHz | — |
| Propagation Delay (tpd) | 55 ns | — |
| Packhaging | 84-terminal CPGA (Ceramic Pin Grid Array) | JLCC-68 (J-Lead Ceramic) |
| Package Body Size | 28.45 mm square | — |
| Process Technology | CMOS | CMOS EPROM |
| Uri ng Pagpapasok | Through-Hole (PGA) | Surface Mount |
| Military Screening | MIL-STD-883 Revision B | — |
| Programming Technology | UV-EPROM (non-volatile) | UV-Erasable EPROM |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | Non-compliant (ceramic JLCC, contains lead) |
| Usable Gates | — | 5000 |
| Flip-Flops | — | 192 |
| Speed Grade | — | -2 |
| Temperature na Operasyon | — | 0C to +70C (commercial) |
| Architecture | — | Sum-of-products with Programmable Interconnect Array (PIA) |
| Volte ng Pagbibigay | — | 5 V (typical) |
| Katayuan ng Lifecycle | — | Obsolete (legacy Altera MAX 5000 family) |