EPM5192IC-1 vs EPM5192JC-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192IC-1 sa pamamagitan ng Altera at EPM5192JC-1N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192IC-1 | EPM5192JC-1N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 EPLD | MAX 5000 |
| Macrocells | 192 | 192 |
| Usable Gates | 3750 | 3750 |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 64 | — |
| Pin-to-Pin Delay (tPD) | 15 ns (max, -1 speed grade) | — |
| Counter Frequency (fCNT) | 76.9 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | 4.75 V to 5.25 V |
| Temperature na Operasyon | -40C to +85C (industrial) | [DATA_NEEDED: industrial/commercial temperature range] |
| Technology | CMOS, UV-erasable, in-system programmable | CMOS EPROM (UV-erasable) |
| Packhaging | 68-pin ceramic J-lead (IC-1 suffix) | 84-pin Ceramic Quad Flat Pack (CQFP) |
| Programming Interface | JTAG / IEEE Std 1149.1 boundary scan | JTAG / Altera ByteBlaster |
| Security Bit | Yes (design protection) | — |
| Supply Current (Icc, typical) | [DATA_NEEDED: Icc] mA | — |
| Output Drive Current (IOH/IOL) | [DATA_NEEDED: IOH/IOL] mA | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 64 |
| External Clock Inputs (GCLK) | — | 1 |
| Propagation Delay (tPD) | — | 40 ns |
| Maximum Clock Frequency (fMAX) | — | 62.5 MHz |
| JEDEC Package Code | — | S-CQCC-J84 |