EPM5192IC-1 vs EPM5192LC-1 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192IC-1 sa pamamagitan ng Altera at EPM5192LC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192IC-1 EPM5192LC-1
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 5000 EPLD MAX 5000
Macrocells 192 192
Usable Gates 3750 —
Dedicated Inputs 7 7
I/O Pins 64 —
Pin-to-Pin Delay (tPD) 15 ns (max, -1 speed grade) —
Counter Frequency (fCNT) 76.9 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) —
Temperature na Operasyon -40C to +85C (industrial) 0C to +70C (commercial)
Technology CMOS, UV-erasable, in-system programmable CMOS, UV-erasable / OTP EPROM cell
Packhaging 68-pin ceramic J-lead (IC-1 suffix) —
Programming Interface JTAG / IEEE Std 1149.1 boundary scan —
Security Bit Yes (design protection) —
Supply Current (Icc, typical) [DATA_NEEDED: Icc] mA —
Output Drive Current (IOH/IOL) [DATA_NEEDED: IOH/IOL] mA —
Device Type — EPLD / CPLD
Logic Gates — 3750 (typical usable)
User I/O — 64
Bilang ng Pins — 84
Package Type — LDCC (Leaded Ceramic Chip Carrier), plastic windowless
Propagation Delay — 25 ns
Maksimum na Taktiko ng Oras — 50 MHz
Volte ng Pagbibigay — 5 V nominal (4.75 V to 5.25 V)
Programmable Memory — EPROM (one-time or UV-erasable)
Speed Grade — -1
Tindminan RoHS — Non-compliant (ceramic LDCC with Pb-bearing terminations)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita