EPM5192JC vs EPM5192GC-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192JC sa pamamagitan ng Intel at EPM5192GC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192JC | EPM5192GC-1 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Series | EPM5192 (Classic / MAX-class) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Interconnect Architecture | Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS, UV-erasable / OTP |
| Packhaging | 68-pin PLCC (JC) windowed ceramic | 100-pin Ceramic PGA (GC) |
| Uri ng Pagpapasok | Surface Mount | Through-Hole (PGA) |
| Programming Method | UV-erase + EPROM programmer | — |
| Non-Volatile Configuration | Yes (EPROM cell array) | — |
| Logic Family | Classic CPLD (EPM5xxx series) | — |
| Temperature na Operasyon | [DATA_NEEDED: commercial / industrial / military grade] | [DATA_NEEDED: operating temperature grade] |
| Volte ng Pagbibigay | [DATA_NEEDED: VCC nominal] | — |
| Propagation Delay | [DATA_NEEDED: tpd spec by speed grade] | — |
| Tindminan RoHS | [DATA_NEEDED: original Altera marking not RoHS] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 5000 (Classic) |
| Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 3,750 |
| Dedicated Inputs | — | 7 |
| User I/O Pins | — | 64 |
| Maximum Propagation Delay (tPD) | — | 40 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Configuration Method | — | UV-Erase / One-Time Programmable |
| Interconnect | — | Peripheral Interconnect Array (PIA) |