EPM5192JC84-1 vs EPM5192LI Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192JC84-1 sa pamamagitan ng Altera at EPM5192LI sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192JC84-1 | EPM5192LI |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Type | UV-Erasable/OTP Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Family | MAX 5000 | — |
| Macrocells | 192 | 192 |
| Propagation Delay (tpd) | 40 ns (worst case) | — |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V (5 V ±5 %) | — |
| Process Technology | CMOS EPROM | — |
| Operating Temperature Grade | Commercial | — |
| Packhaging | 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) | 84-pin PQCC (J84) |
| JESD-30 Package Code | S-CQCC-J84 | — |
| Terminal Form | J-BEND | — |
| Package Shape | SQUARE | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programmability | UV-erasable (window) / OTP in production | — |
| Configuration Memory | EPROM (non-volatile, instant-on) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Device Family | — | MAX 5000 |
| Usable Gates | — | 3,750 |
| Logic Array Blocks (LABs) | — | 12 |
| Maximum Operating Frequency | — | 40 MHz |
| Propagation Delay (tPD) | — | 55 ns |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| Technology | — | CMOS, UV-erasable EPROM |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 72 |
| User I/O Pins | — | 64 |
| JEDEC Package Code | — | S-PQCC-J84 |
| Hanay ng Temperature na Operasyon | — | Industrial (-40C to +85C) |