EPM5192LC-1 vs EPM5192LC-45 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC-1 sa pamamagitan ng Altera at EPM5192LC-45 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC-1 | EPM5192LC-45 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD / CPLD | — |
| Macrocells | 192 | 192 |
| Logic Gates | 3750 (typical usable) | — |
| Dedicated Inputs | 7 | [DATA_NEEDED: dedicated input count] |
| User I/O | 64 | — |
| Bilang ng Pins | 84 | — |
| Package Type | LDCC (Leaded Ceramic Chip Carrier), plastic windowless | LCC (Leaded Ceramic Chip Carrier) with UV window |
| Propagation Delay | 25 ns | — |
| Maksimum na Taktiko ng Oras | 50 MHz | — |
| Volte ng Pagbibigay | 5 V nominal (4.75 V to 5.25 V) | 5 V |
| Technology | CMOS, UV-erasable / OTP EPROM cell | EPROM-based CMOS |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programmable Memory | EPROM (one-time or UV-erasable) | — |
| Speed Grade | -1 | -45 (45 ns tPD) |
| Tindminan RoHS | Non-compliant (ceramic LDCC with Pb-bearing terminations) | [DATA_NEEDED: RoHS status] |
| Series | — | EPM5192 |
| Logic Elements | — | 192 macrocells |
| Maximum Operating Frequency | — | 100 MHz |
| Pin-to-Pin Delay (tPD) | — | 45 ns |
| Programmable I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Configuration Memory | — | UV-erasable EPROM / OTP |
| Package Code | — | LC |
| Uri ng Pagpapasok | — | Surface Mount (LCC) |
| Datasheet Page Count | — | 52 pages |