EPM5192LC-25 vs EPM5192LC-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC-25 sa pamamagitan ng Altera at EPM5192LC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC-25 | EPM5192LC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| Logic Elements | 192 (1 macrocell ≈ 1 LE in MAX 5000 architecture) | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Speed Grade | -25 (25 ns) | -1 |
| Packhaging | JLCC-84 (ceramic J-lead chip carrier) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Programmable Technology | UV-erasable / OTP (EPROM-based) | — |
| Programming Interface | JTAG / Altera programming hardware (legacy) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Volte ng Pagbibigay | 5 V (typical, MAX 5000) | 5 V nominal (4.75 V to 5.25 V) |
| I/O Standard | TTL-compatible | — |
| Configuration Memory | Non-volatile EPROM (on-chip) | — |
| Manufacturer | Altera Corporation (now Intel PSG) | — |
| Tindminan RoHS | Unknown (legacy ceramic package typically non-RoHS) | Non-compliant (ceramic LDCC with Pb-bearing terminations) |
| Device Type | — | EPLD / CPLD |
| Logic Gates | — | 3750 (typical usable) |
| Dedicated Inputs | — | 7 |
| User I/O | — | 64 |
| Bilang ng Pins | — | 84 |
| Package Type | — | LDCC (Leaded Ceramic Chip Carrier), plastic windowless |
| Propagation Delay | — | 25 ns |
| Maksimum na Taktiko ng Oras | — | 50 MHz |
| Technology | — | CMOS, UV-erasable / OTP EPROM cell |
| Programmable Memory | — | EPROM (one-time or UV-erasable) |