EPM5192LC84-1 vs EPM5192GC-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC84-1 sa pamamagitan ng Altera at EPM5192GC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC84-1 | EPM5192GC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 (Classic) |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 | 12 |
| Usable Gates | 7,500 | 3,750 |
| Speed Grade | -1 | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD ns value] | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V |
| Program Memory Type | UV-EPROM / OTP | — |
| Packhaging | 84-pin PLCC (LC84) | 100-pin Ceramic PGA (GC) |
| Uri ng Pagpapasok | Surface Mount (J-lead) | Through-Hole (PGA) |
| Temperature na Operasyon | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| I/O Count | [DATA_NEEDED: I/O pin count] | — |
| Tindminan RoHS | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: RoHS status] |
| Process Technology | CMOS EPROM | CMOS, UV-erasable / OTP |
| Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Dedicated Inputs | — | 7 |
| User I/O Pins | — | 64 |
| Maximum Propagation Delay (tPD) | — | 40 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Configuration Method | — | UV-Erase / One-Time Programmable |
| Interconnect | — | Peripheral Interconnect Array (PIA) |