EPM5192LC84-1 vs EPM5192JC84-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC84-1 sa pamamagitan ng Altera at EPM5192JC84-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC84-1 | EPM5192JC84-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | UV-Erasable/OTP Complex Programmable Logic Device (CPLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 7,500 | — |
| Speed Grade | -1 | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD ns value] | — |
| Supply Voltage (VCC) | 5 V | — |
| Program Memory Type | UV-EPROM / OTP | — |
| Packhaging | 84-pin PLCC (LC84) | 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) |
| Uri ng Pagpapasok | Surface Mount (J-lead) | Surface Mount |
| Temperature na Operasyon | 0C to +70C (commercial) | — |
| I/O Count | [DATA_NEEDED: I/O pin count] | — |
| Tindminan RoHS | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: RoHS status] |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Propagation Delay (tpd) | — | 40 ns (worst case) |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V (5 V ±5 %) |
| Operating Temperature Grade | — | Commercial |
| JESD-30 Package Code | — | S-CQCC-J84 |
| Terminal Form | — | J-BEND |
| Package Shape | — | SQUARE |
| Programmability | — | UV-erasable (window) / OTP in production |
| Configuration Memory | — | EPROM (non-volatile, instant-on) |