EPM5192LI vs EPM5192LI-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LI sa pamamagitan ng Altera at EPM5192LI-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LI | EPM5192LI-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable/OTP Complex PLD) |
| Macrocells | 192 | 192 |
| Usable Gates | 3,750 | — |
| Logic Array Blocks (LABs) | 12 | 12 |
| Maximum Operating Frequency | 40 MHz | — |
| Propagation Delay (tPD) | 55 ns | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | — |
| Technology | CMOS, UV-erasable EPROM | CMOS, UV-erasable / OTP |
| Dedicated Inputs | 7 | — |
| Total Inputs | 72 | 72 (7 dedicated + 64 I/O) |
| User I/O Pins | 64 | — |
| Packhaging | 84-pin PQCC (J84) | 84-pin PLCC (J-lead), JEDEC S-PQCC-J84 |
| JEDEC Package Code | S-PQCC-J84 | — |
| Hanay ng Temperature na Operasyon | Industrial (-40C to +85C) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 5000 |
| User I/O | — | 64 |
| Propagation Delay (tpd) | — | 55 ns (max) |
| Maximum Internal Frequency | — | 100 MHz |
| Volte ng Pagbibigay | — | 4.5 V to 5.5 V |
| Temperature na Operasyon | — | -40 C to +85 C (industrial) |
| Typical Power Dissipation | — | 600 mW at 5 V / 25 C |
| Design Toolchain | — | Altera MAX+plus II |