EPM570F100A5N vs EPM240F100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570F100A5N sa pamamagitan ng Altera at EPM240F100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570F100A5N | EPM240F100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | 192 |
| User Flash Memory | 8 Kbits | — |
| Pin-to-Pin Delay (tPD) | 5.4 ns | — |
| Maximum Operating Frequency | 201.1 MHz | [DATA_NEEDED: fmax per datasheet] |
| User I/O Pins (max) | 76 | — |
| Global Clock Lines | 4 | — |
| Supply Voltage - Core | 3.3 V | — |
| Supply Voltage - I/O Banks | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Process Technology | 0.18 µm flash | — |
| Packhaging | 100-ball FBGA | 100-ball FineLine BGA (FBGA-100) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG / ByteBlasterMV |
| Temperature na Operasyon | 0°C to +85°C (commercial) | — |
| Tindminan RoHS | Compliant | Compliant |
| Device Family | — | MAX II |
| Logic Elements (LEs) | — | 240 |
| User I/O Pins (maximum) | — | 80 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.7 ns |
| Global Clock Networks | — | [DATA_NEEDED: count] |
| Hanay ng Temperature na Operasyon | — | 0C to +85C (commercial) |
| Supply Voltage Core (VCCINT) | — | 3.3 V |
| I/O Bank Voltage (VCCIO) | — | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) |
| Configuration Memory | — | Non-volatile flash (instant-on) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |