EPM570F100C5N vs EPM570GF100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570F100C5N sa pamamagitan ng Altera at EPM570GF100C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570F100C5N | EPM570GF100C5N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Logic Elements | 570 | 570 |
| Number of Macrocells | 440 | — |
| User I/Os | 76 | 76 |
| Number of Logic Array Blocks | 57 | — |
| Propagation Delay (tPD) | 5.4 ns | 5.4 ns |
| Process Technology | 0.18 micron CMOS | — |
| Supply Voltage - Internal | 2.5 V, 3.3 V | — |
| I/O Standards Supported | 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL | — |
| Temperature na Operasyon | 0C to 85C (TJ) | -40C to +125C (industrial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Packhaging / Kaso | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch | — |
| Supplier Device Package | 100-FBGA | — |
| Configuration Memory | On-chip Flash (instant-on, non-volatile) | On-chip Flash (non-volatile) |
| In-System Programmability | Yes (JTAG, IEEE 1532) | — |
| User Flash Memory (UFM) | 8 Kbit | — |
| Lead Free / RoHS | Yes (per verified data) | — |
| Programming Interface | JTAG (IEEE 1149.1) | IEEE 1532 / JTAG (IEEE 1149.1) ISP |
| Device Family | — | MAX II |
| Macrocells | — | 440 |
| Packhaging | — | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch |
| Core Voltage | — | 1.8 V (internal) |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) |
| Tindminan RoHS | — | Compliant (lead-free) |
| Logic Family / Process | — | CMOS, Flash-based LUT |
| LABs | — | 4 (16 macrocells per LAB) |