EPM570F256C4N vs EPM570F256C5NRR Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570F256C4N sa pamamagitan ng Intel at EPM570F256C5NRR sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570F256C4N | EPM570F256C5NRR |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX II | MAX II |
| Logic Elements | 570 LE | 570 |
| Macrocells | 440 | — |
| Logic Array Blocks (LABs) | 57 | — |
| User I/O Count | 160 | — |
| User Flash Memory (UFM) | 8 Kbit | 8 Kbytes |
| Packhaging | 256-ball FineLine BGA (FBGA) | 256-ball FBGA (FineLine BGA) |
| Package Size | 17 mm × 17 mm | — |
| Process Technology | 0.18 µm 6-layer-metal flash | 0.18 µm flash CMOS |
| Maximum Internal Frequency | 304 MHz | — |
| Pin-to-Pin Logic Delay | 5.4 ns | — |
| Operating Supply Voltage (VCCINT) | 2.5 V, 3.3 V | — |
| MultiVolt I/O Voltages | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| Hanay ng Temperature na Operasyon | 0 °C to +70 °C (commercial) | — |
| In-System Programmability (ISP) | Yes (JTAG) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Family | — | MAX II (CPLD) |
| Macro Cells | — | 440 |
| Pin-to-Pin Delay (tPD) | — | 8.7 ns (C5 speed grade) |
| Internal fMAX | — | 201.1 MHz |
| Maximum User I/O Pins | — | 212 (typical, 256-BGA) |
| Operating Supply Voltage - Core (VCCINT) | — | 2.5 V (3.3 V tolerant) |
| Operating Supply Voltage - I/O (VCCIO) | — | 2.5 V or 3.3 V |
| Temperature na Operasyon | — | 0 °C to +85 °C (commercial, C-speed grade) |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Configuration Memory | — | On-chip non-volatile flash |