EPM570GT100C3N vs EPM570GT100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570GT100C3N sa pamamagitan ng Altera at EPM570GT100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM570GT100C3N - MAX II CPLD 440 Macrocells 76 I/O TQFP-100 | Intel
EPM570GT100C3N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM570GT100C3N | EPM570GT100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Series | MAX II G (Green) | MAX II |
| Logic Elements | 570 | 570 |
| Macrocells | 440 | — |
| User I/O Pins | 76 | — |
| User Flash Memory | 8 Kbits | — |
| Propagation Delay (tPD max) | 5.4 ns | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V typical) | — |
| I/O Voltage Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.18 um | — |
| Temperature na Operasyon | 0C to 85C (TJ, commercial) | 0C to +85C (Commercial) |
| Packhaging | 100-pin TQFP (14x14 mm) | TQFP-100 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programmable Type | In-System Programmable (Flash, non-volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Tindminan RoHS | Lead free / RoHS Compliant | Compliant |
| Equivalent Macrocells | — | 440 |
| User I/O | — | 76 |
| LABs | — | 36 |
| Maximum Frequency | — | 304 MHz |
| Pin-to-Pin Delay | — | [DATA_NEEDED: tPD value] |
| User Flash Memory (UFM) | — | 8 Kbit |
| Operating Supply Voltage (VCCINT) | — | 2.5 V / 3.3 V |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVTTL/LVCMOS |
| Programmability | — | Flash-based, non-volatile (ISP via JTAG) |
| JTAG Support | — | IEEE 1149.1 boundary scan |