EPM570GT100C3N vs EPM570M100C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570GT100C3N sa pamamagitan ng Altera at EPM570M100C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM570GT100C3N - MAX II CPLD 440 Macrocells 76 I/O TQFP-100 | Intel
EPM570GT100C3N ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | EPM570GT100C3N | EPM570M100C4N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | MAX II |
| Series | MAX II G (Green) | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | 440 |
| User I/O Pins | 76 | — |
| User Flash Memory | 8 Kbits | — |
| Propagation Delay (tPD max) | 5.4 ns | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V typical) | — |
| I/O Voltage Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.18 um | 0.18 µm 6-layer-metal flash |
| Temperature na Operasyon | 0C to 85C (TJ, commercial) | 0 °C to +85 °C (commercial, C suffix) |
| Packhaging | 100-pin TQFP (14x14 mm) | 100-pin MBGA (Micro FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount | — |
| Programmable Type | In-System Programmable (Flash, non-volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) ISP |
| Tindminan RoHS | Lead free / RoHS Compliant | Compliant |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 570 |
| User I/Os | — | 76 |
| Pin-to-Pin Logic Delay (tPD) | — | 5.4 ns |
| User Flash Memory (UFM) | — | 8 Kbits |
| Supply Voltage (Core) | — | 3.3 V (typical for MAX II) |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Configuration Memory | — | Non-volatile flash (instant-on) |