EPM570GT100C5 vs EPM570GT100C3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570GT100C5 sa pamamagitan ng Intel at EPM570GT100C3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM570GT100C3N - MAX II CPLD 440 Macrocells 76 I/O TQFP-100 | Intel
EPM570GT100C3N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM570GT100C5 | EPM570GT100C3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements (LE) | 570 | — |
| Equivalent Macrocells | 440 | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Maximum User I/O | 76 | — |
| Propagation Delay (tPD) | 5.4 ns | — |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltages (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5 V | — |
| Packhaging | TQFP-100 (100-pin TQFP, 14x14 mm) | 100-pin TQFP (14x14 mm) |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0C to 85C (TJ, commercial) |
| Process Technology | 0.30 µm 6-layer-metal flash | 0.18 um |
| Programming Interface | JTAG IEEE 1149.1, ISP | JTAG (IEEE 1149.1) / ISP |
| Configuration Method | Non-volatile flash (instant-on) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | Lead free / RoHS Compliant |
| Series | — | MAX II G (Green) |
| Logic Elements | — | 570 |
| Macrocells | — | 440 |
| User I/O Pins | — | 76 |
| User Flash Memory | — | 8 Kbits |
| Propagation Delay (tPD max) | — | 5.4 ns |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V typical) |
| I/O Voltage Standards | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Programmable Type | — | In-System Programmable (Flash, non-volatile) |