EPM570GT144C5N vs EPM570T144C5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570GT144C5N sa pamamagitan ng Altera at EPM570T144C5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570GT144C5N | EPM570T144C5 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | MAX II |
| Logic Elements / Macrocells | 440 | — |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Propagation Delay (tPD) | 5.4 ns | — |
| Maximum Internal Frequency (fMAX) | 201.1 MHz | — |
| User Flash Memory | 8 Kbits | — |
| Process Technology | 0.18 µm | 0.18 µm CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V | [DATA_NEEDED: VCCINT nominal voltage] |
| I/O Bank Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Hanay ng Temperature na Operasyon | 0 °C to +85 °C (Commercial) | — |
| Packhaging | 144-pin TQFP (20 x 20 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | JTAG (IEEE 1149.1), ISP |
| Configuration Time (Instant-On) | < 1 ms | — |
| Tindminan RoHS | Compliant | Compliant |
| Supported I/O Standards | LVCMOS, LVTTL, PCI, SSTL-2, SSTL-3 | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 440 |
| Pin-to-Pin Delay (tPD) | — | 5.4 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| User I/Os | — | 116 |
| Total Package Pins | — | 144 |
| Packhaging / Kaso | — | 144-TQFP (TQFP-144) |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V (multi-voltage I/O supported) |
| Configuration Memory | — | On-chip flash (non-volatile, instant-on) |
| Temperature na Operasyon | — | Commercial (0 °C to +85 °C) |